CDF Note #4386, Version 1.0 (11/13/97)

Specification of Scintillator Mezzanine Card for Muon Trigger

E. James, J. Chapman (University of Michigan)

I. Introduction

The goal of this document is to describe an initial proposal for the design of a TDC mezzanine card which is to be used to construct muon trigger primitive data from discriminated scintillator signals. Scintillator data is a critical component in the muon trigger for Run II due to the fact that the time between beam crossings at the detector interaction point is expected to be as short as 132 ns while the drift time of the muon chambers is on the order of micro-seconds. The muon trigger utilizes scintillator data to provide a time stamp for individual drift chamber hits so that unique trigger decisions can be formed for each beam crossing.

The upgraded CDF muon detector for run II contains five separate scintillator systems (CSP, CSX, WMS, BMS, and TMS). The raw phototube signals from each of these systems are discriminated at the detector front end and passed into TDC cards. Each TDC has 96 input channels, and each of the individual inputs is passed to the mezzanine card for inclusion in trigger processing. The goal of the mezzanine card designed for the muon detector scintillator systems is to provide a timing gate for the discriminated phototube signals. Signals produced in the detector have specific, but different, time windows within the 132 ns beam crossing time for different muon scintillators. On the other hand, particles originating from secondary interactions or outside of the detector altogether are more likely to generate scintillator hits outside of these time windows. Therefore, the mezzanine card is designed to look on a channel by channel basis for scintillator signals which fall within a programmable window within the 132 ns crossing clock period.

The biggest challenge to the design of this mezzanine card is to develop a single version of the card which has the ability to create trigger primitives for each of the muon scintillator systems mentioned above. In addition, it would be advantageous if the same mezzanine card could also be used to incorporate hadron calorimeter (HAD) signals into the muon trigger. The CDF hadron calorimeter utilizes a scintillator based readout system and therefore has analogous signals to those in the muon scintillator systems. The minimum ionizing energy deposited by a muon passing through a calorimeter tower is observed as a discriminated phototube signal at the TDC input. To ensure that the observed energy deposition in a given calorimeter tower is consistent in time with that from a particle produced in the primary interaction region, a similar signal gating technique is employed. The algorithm for producing hadron calorimeter trigger primitives differs somewhat from that utilized for the other muon scintillator systems. However, these differences can be incorporated into FPGA designs so that a single board can be utilized for all systems.

1. Board Design Constraints

As previously mentioned, each TDC mezzanine card receives 96 channels of input signals

which are simple copies of the signals which arrive at the front panel of the TDC. An ideal design for a scintillator mezzanine card would provide unique timing gates for each of the 96 input channels. In addition, the position of each timing gate within the 132 ns CDF clock period and the width of each timing gate would be programmable so that a single version of the card could be utilized in each of the different systems discussed above. In practice, the amount of hardware needed to implement 96 independent gates would not fit on a single TDC mezzanine card. Therefore, it is necessary to utilize single timing gates for multiple input signals to the scintillator mezzanine card. This fact places an important constraint on the front end and cable delays associated with signals received at the TDC inputs from the various scintillator systems. All signals which are gated using a common timing window must have identical front end and cable delays to guarantee proper generation of trigger primitive data from each of the inputs.

Two different schemes have been considered for the design of this card. One scheme would utilize six independent gates per card which would require that each group of 16 input signals have identical front end and cable delays. This would need to be true independently for each of the six different scintillator systems utilizing this card design. The second scheme would have only four independent gates per card. In this case, groups of 24 input signals would be required to have identical front end and cable delays. It turns out that the desire to combine signals from the BMS and TMS into fewer TDC cards forces one to choose the second option. The reason for this requirement is discussed in more detail in a subsequent section. However, it is important to note that this demand places cabling constraints on each of the different scintillator systems to make use of this particular card design. These constraints will also be discussed in subsequent sections.

In the present design scheme, the position of each of the four independent gates within the 132 ns CDF crossing clock is programmable with a timing resolution of 1 ns. The specific part being utilized is a Dallas Semiconductor silicon delay line (DS1020-100). Separate eight bit registers accessible via VME read and writes will control the actual position of each gate within the crossing interval. It was originally hoped that a single programmable width would be adequate for each of the four gates on the card. This design choice would have been based on the assumption that the majority of cards would receive inputs from

only one of the muon scintillator systems and that the width of the timing gates would not need to be varied within individual systems. However, the desire to combine inputs from the central, endwall, and plug calorimeter modules into single TDC cards forces the choice

of independently programmable widths for each of the four gates. This requirement is due to the fact that secondary particles produced via interactions in the beampipe and focusing magnets have shorter paths to the plug module than to the other parts of the calorimeter. Therefore, the difference in signal arrival time for energy deposition from particles produced in the primary interaction versus that from particles produced in secondary interactions is smaller for plug inputs than for the inputs from other calorimeter modules. Hence, a tighter timing gate is required to distinguish between prompt and background signals in the plug input channels. In addition, since the present baseline plan calls for combining BMS and TMS signals into single TDC cards, the added flexibility of separately programmable widths for each of the four gates within a single scintillator mezzanine card will allow for a unique specification of the gating width in each of these systems.

A block diagram of the proposed scintillator mezzanine card is shown in the figure above. The card is designed to produce 96 channels of trigger primitive output such that a direct one to one mapping exists between the input and output channels. The number of trigger primitive outputs will be smaller for the hadron calorimeter which has somewhat different requirements. These special requirements will be discussed in a subsequent section. The actual gating of input signals is done with CPLD chips due to the fact that channel to channel signal routing variations within these chips is significantly smaller than in FPGA chip designs. The design of a single channel within the CPLD is shown below. Each input signal falling within the specified timing window will produce a 132 ns pulse on the corresponding output channel. The present design of the card places the rising edge of the output pulse on the order of 15-20 ns past the trailing edge of the gate. Due to the fact that this edge is also utilized to reset the flip-flops which latch input signals arriving within the specified timing interval, there is a loose constraint placed on the maximum width of the timing window itself. In order to ensure that sufficient time exists to produce the required output pulses and reset flip-flops outside of the specified timing window, the maximum allowed gate width will be on the order of 100 ns.

As discussed previously, there are actually four programmable timing gates per mezzanine card. This implies that the position of output pulses within the 132 ns beam crossing clock can be different for each group of 24 input channels on the card. Once produced on the mezzanine card, the output signals are passed back onto the TDC card and transferred to transition modules at the back of the crate via the J3 connector. Each transition module

also receives a version of the 132 ns beam crossing clock via the mezzanine card which is utilized to latch all output signals arriving at the card. This latching signal is produced on the scintillator mezzanine card by passing the CDF clock signal through an additional programmable silicon delay line available on the card. This programmable feature of the card allows one to latch the output signals received at the transition module anywhere within the 132 ns clock cycle and to avoid those points within the clock cycle where any one of the four different sets of outputs could be in transition.

The fact that only one latching signal is available at the transition module does present some additional complication to the formation of TDC input maps for the various muon scintillator systems. Each transition module is designed to have up to six serial output streams using the HOTLink parallel to serial converter chips. The muon matchbox cards which receive inputs directly from all muon scintillator systems except for CSP have been designed to process all trigger information within a 30 degree phi slice of the detector. Therefore, all muon primitive data within each serial stream must correspond to a unique 30 degree wedge of the CDF detector. Due to the fact that different muon scintillator systems have different granularities in azimuth, the number of serial connections per TDC board required to distribute 96 channels worth of output varies between the systems. In order to get around this problem, all output channels on the scintillator mezzanine card pass through FPGAs which route the output signals to the appropriate serial connections on the transition modules. Since the FPGAs are programmable, each of the different muon scintillator systems can have a unique output mapping even though the mezzanine boards are otherwise identical. Due to the fact that only six serial outputs are available for each TDC card, there is a limit on the azimuthal coverage spanned by the inputs passed into each TDC card of 180 degrees.

In addition, all trigger primitive data which is sent into a particular serial output stream during a given 132 ns clock period must correspond to a single interaction period in the detector. This requirement is due to the hardware which is utilized to receive the serial streams at the matchbox cards. Since the number of trigger primitive outputs which correspond to a particular 30 degree azimuthal slice of the detector will in most cases not be a specific multiple of the 24 channel input groups, an additional loose constraint must be placed on the relative front end and cable delays of the four different input groups to a specific TDC. In addition to the fact that groups of 24 input signals must have identical front end and cable delays, all four input groups within a specific TDC must have front end and cable delays which are within 100 ns of each other. This requirement ensures

that a position within the 132 ns crossing clock can be found at which the output data being latched at the transition module for each of the four input groups corresponds to

the same interaction in the detector.

III. Effect of Constraints on Individual Systems

This section provides a specific description of the constraints imposed on input cabling for each of the different muon scintillator systems based on the design of the mezzanine card. For each of the systems discussed, a suggested TDC input mapping is proposed which would meet the requirements imposed by trigger primitive generation and transmission.

1. BMS & TMS

In order to reduce the number of unused TDC channels in the muon system, one would like combine signals from these scintillator groups into common TDC cards. The BMS and TMS scintillators are part of the intermediate muon system (IMU) and are attached

to the iron toroids at the east and west ends of the CDF detector. Due to the support structure of the toroids, the azimuthal coverage of these scintillator systems is limited

to the region between -45 degrees and 225 degrees. In addition, detector access requirements necessitate being able to pull apart the toroids in the north-south direction which implies the need for one readout crate for the region between -45 degrees and 90 degrees and another for the region between 90 degrees and 225 degrees.

Some basic properties of the two systems are summarized in the following table:

Since the total number of combined channels for BMS and TMS in a 135 degree azimuthal slice at either end of the detector is 162, a minimum of two TDC cards per region per end are required. An important constraint on the input maps for these two TDC cards is that no group of 24 input signals on either card is allowed to contain signals from both BMS and TMS. This requirement is due to the fact the front end delays in the two systems are not guaranteed to be identical. Suggested input maps for the two TDC cards are shown in the following tables:

Note that this scheme allows for 15 degrees of spare BMS channels and 45 degrees of spare TMS channels. TMS scintillator coverage could be expanded to full 360 degree coverage without additional TDC cards, but the equivalent statement is not true for the BMS scintillator. A complete list of cabling constraints for these systems based on the above TDC input maps is listed below.

• Each 30 degree wedge of BMS must have identical cable lengths for all signals (both forward and rear scintillator wedges).
• Each 60 degree wedge of TMS must have identical cable lengths for all signals (both inner and outer scintillator wedges).
• All BMS and TMS signals within each 135 degree readout segment must have front end and cable delays consistent within 100 ns.

1. WMS

The WMS scintillator system is also part of the intermediate muon system (IMU). Unlike the other detectors which make up the IMU, the WMS scintillators are considered to be part of the central detector and the readout path for the signals is via TDC crates in the first floor counting house. The location of the these scintillators is on the back face of the endwall calorimeter.

WMS properties are summarized in the following table:

The WMS is unlike any other scintillator system in that signals from the east and west ends of the CDF detector are combined for readout into single TDC cards. The reason

for this difference is the small number of WMS channels within a 180 degree phi slice of the detector. The total number of signals per 180 degrees per end is 36 which means that the signals from both ends can easily fit within one TDC card. The assumption which was used to make up the following TDC input map is that the system can easily be made to be symmetric between the two ends. In other words, cables coming from the same azimuthal slice on the two opposite ends of the detector will naturally have identical cable lengths.

If this statement is not accurate, a different input map could also be constructed in which cable lengths from the two detector ends could be different. In this case, however,

identical cable lengths would be required for signals coming from a wider azimuthal slice at both ends of the detector. The suggested TDC input map looks as follows:

The cabling constraints for the WMS based on this TDC input map are listed below.

• Each 60 degree wedge of WMS must have identical cable lengths for all signals.
• The corresponding 60 degree wedge of WMS on the opposite end of the detector must also have identical cable lengths for all signals.
• All WMS signals within each 180 degree readout segment must have front end and cable delays consistent within 100 ns.

1. CSX

The CSX scintillators are part of the muon extension which provides coverage for muon track stubs in the eta region between 0.6 and 1.0. The extension consists of four layers

of drift cells which are sandwiched in between two layers of scintillator. The phototube readout for the upper and lower scintillator layers are at opposite ends so that a precise mean-timed measurement of the signal arrival time can be made. The scintillators on the

top and bottom layers are also half cell staggered so that the mean-timing measurement can be made for a top scintillator in coincidence with two overlapping bottom scintillators which increases the overall azimuthal segmentation of the system by a factor of two. The actual measurement of the mean arrival time is made by separate hardware on the front end prior to arrival of the signals at the TDC. Due to the precise nature of these measurements, the mezzanine card has unacceptable timing resolution for the gating of these signals. Therefore, the signal gating is performed on the same front end hardware which makes the mean-timing measurement.

The gated signals are passed into the inputs of the TDC for inclusion in the trigger. The plan is to set the timing gates on the scintillator mezzanine card to their maximum width

to ensure that all signals arriving within the front end gating window are converted into valid trigger primitive data. It is assumed that the output signals received at the TDC from the mean-timing module are formed from coincidences of individual mean-timed output signals with the front end timing gate. It is also assumed that these signals have a nominal width on the order of 40 ns.

Basic properties of the CSX are summarized in the following table:

The TDC input mapping for this system is straightforward. There is a slight difference between the east and west ends of the detector in that the muon extension does not exist in the phi region between 75 and 105 degrees on the east end of the detector. This is due to detector support equipment which exists in this region. In the case of the CSX, this dead area simply corresponds to unused TDC channels on the cards utilized for signals from that end of the detector. The suggested TDC input map looks as follows:

The cabling constraints which are imposed on the CSX based on above TDC input map are listed below.

• Each 45 degree wedge of CSX must have identical cable lengths for all signals.
• All CSX signals within each 180 degree readout segment must have front end and cable delays consistent within 100ns.

1. CSP

The CSP scintillator system is part of the muon extension designed to find high Pt muon stub candidates in the eta region between -0.6 and 0.6. This part of the muon detector contains four planes of drift cells arranged in a rectangular box around the central part of the detector. The scintillator is arranged in an additional plane directly above the drift cells. Each piece of scintillator is constructed to cover two drift cells in width and ½ of a drift cell in length. Coverage is not completely symmetric on the four extension walls (north, south, top, and bottom). However, the actual number of scintillator inputs from any one wall is guaranteed to be below the maximum TDC channel count (96) which suggests that a single TDC per wall is sufficient.

Unlike the other muon scintillator trigger primitives which are passed directly into the matchbox cards, CSP primitives are passed into pre-match cards which attempt to match scintillator and drift cell hits originating from this part of the detector in their natural rectangular geometry. The pre-match card then assigns each match to a corresponding subset of 2.5 degree azimuthal bins, and this information is passed to the matchbox cards for inclusion in track matching. A single pre-match card is used to process all scintillator and drift cell trigger primitives obtained from a single wall of the extension. Therefore, a total of four pre-match cards are required to complete the system. Attempting to reduce the total number of TDC cards in the system by mixing scintillator inputs from different walls into single cards is not possible due to the fact that all serial outputs from a given transition module connect to a single pre-match card.

Since the scintillator is cut to half the length of the drift cells, individual pieces are installed back to back with readout at opposite ends of the detector. In constructing a suggested TDC input map for this system, it is assumed that readout is symmetrical between the two ends of the detector. In other words, all scintillator pairs which cover the same set of drift cells at opposite ends of the detector are assumed to have identical cable lengths. The relevant parameters for the CSP system are shown in the following table:

The actual TDC input maps for the CSP scintillator differ between walls due to small differences in channel counts. A systematic approach would be to cable in a counter-clockwise direction alternating between scintillator signals being received from the east and west ends of the detector. The cabling constraints for the CSP based on this TDC input map are listed below.

• Each set of 12 consecutive scintillators read out from the east or west end of the detector must have identical cable lengths for all signals.
• The corresponding set of 12 consecutive scintillators read out on the opposite end of the detector must also have identical cable lengths for all signals.
• All CSP signals from one wall of the detector must have front end and cable delays consistent within 100 ns.

1. Hadron Calorimeter

As discussed in the introduction, the CDF hadron calorimeter utilizes a scintillator based readout system which generates outputs analogous to those in the muon scintillator systems. The hadron calorimeter output available for input into the muon trigger consists of one discriminated phototube signal per calorimeter tower where each individual tower spans 15 degrees in azimuth and 0.1 units in eta. Inputs from three separate calorimeter modules (central, endwall, and plug) are required to span the complete pseudorapidity range of the muon trigger. Since space limitations on the matchbox card limit the number of serial connections which can be accepted from the hadron TDC cards, it is necessary to include all input signals from a 30 degree azimuthal slice of the calorimeter on a single TDC card. In this configuration, the matchbox cards which are designed to receive and process all trigger data within 30 degree azimuthal units require only a single serial input from a single hadron TDC card.

The input map discussed above does present a complication in that each individual TDC card is required to receive and process input signals from each of the three calorimeter modules. Since the front end delays in the three modules are not guaranteed to be identical, there can be no overlap of signals from the different modules within the four groups of input signals to the scintillator mezzanine card. A summary of the input data available from each of the calorimeter module is shown in the following table:

Note that the plug module actually has two individual tiles per 15 degree tower which means that there are two signals per plug tower included in the TDC inputs from this module. Due to the design of the scintillator mezzanine card, each signal in the pair is gated independently and the output pulses are simply combined in the FPGA logic that determines the output mapping.

From the table above the total number of calorimeter inputs from a 30 degree wedge of the hadron calorimeter is 48 per end. The signals from both ends of the calorimeter can therefore be contained within single TDC cards for each 30 degree azimuthal section. The suggested TDC input map for this system depends on two assumptions. One assumption is that all three calorimeter modules have symmetric readout. This means that the cable lengths for signals read out from a tower on the east side of the detector match those for

the corresponding signals on the west side of the detector. The second assumption is that the input signals from plug towers 15-16 are not required to form muon trigger primitives from this system. This assumption is based on the fact that the pseudorapidity range of these towers is outside the range of the muon trigger. The suggested TDC input map looks as follows:

The cabling constraints for the hadron TDC cards based on the input map shown in the table above are listed below.

• Each 30 degree wedge of the central hadron calorimeter must have identical cable lengths for all signals.
• Each 30 degree wedge of the endwall hadron calorimeter must have identical cable lengths for all signals.
• The corresponding 30 degree wedge of the endwall hadron calorimeter on the opposite end of the detector must also have identical cable lengths for all signals.
• Each 30 degree wedge of the plug hadron calorimeter must have identical cable lengths for all signals.
• The corresponding 30 degree wedge of the plug hadron calorimeter on the opposite end of the detector must also have identical cable lengths for all signals.
• All hadron calorimeter signals (central, endwall, and plug) must have front end and cable delays consistent within 100 ns.
• Input signals from plug hadron calorimeter towers 15-16 are not available for use in the muon trigger.