Oct-16-1997

Version 1

VME Address Space for LOCOS

Monica Tecchio

University of Michigan

At the time of this memo, LOCOS uses VME signals only for testing and debugging purposes, that is no LOCOS data is foreseen to be sent into the DAQ stream via VME during normal data taking.

One CY7C960 and four CY7C964 chips are used to implement a VME 32-bit Interface (sheet 5 of the LOCOS Mentor schematics). The CY7C960 is programmed at initialization to operate in I/O Only mode that is it can use up to four REG(3:0) Region inputs and six CS(5:0) Chip Select outputs. The REG(3:0) inputs are fed to the CY7C960 by a Region Decoder PAL (sheet 6 and Appendix A for details) which decodes the VME address placed on the VME Address bus LA(31:0) by the MVME162 and determines whether the current VME transaction is destined to LOCOS. The Region Decoder PAL further decodes the VME Address so to identify six regions in the LOCOS Base Address. Each region corresponds to a unique set of valid REG(3:0) bits. The CY7C960 is programmed to respond only to valid sets of REG(3:0) bits by enabling one of the six CS(5:0) outputs.

The CS(5:0) ouputs are used as double-purpose enables lines. First, they enable a set of Address Bus decoders (sheet 7) to determine, for each region, whether the transaction is a VME Read or VME Write transaction and set appropriate R/W strobes. Second, they enable a set of Data Bus transceivers (sheet 8) that load the content of the VME Data bus LD(31:0) into specialized local data busses.

In what follows is a detailed compilation of the LOCOS Base Address. In compliance with the standardf CDF Address Map for Front-End and Trigger Cards (see CDFNote 2388), LOCOS utilizes part of the User-Defined Address Space to address the six regions mentioned above. LOCOS Address Base for the different regions is contained in Table 1, together with the Chip Select bit they correspond to and a brief description of the LOCOS functionality they are testing and/or simulating.

Table 2 contains a list of the R/W strobes generated by each LA(31:0) address in a given region and a brief description of the LOCOS signal they are testing (if Read strobes) and/or simulating (if Write strobes). Table 3 list the Local Data Bus defined for each region and which LD(31:0) bits it is a copy of.



















Region Address Base Register Enable R/W Description

1

YY 40 00 00 CS(0) = EN_TEST_MODE WO Test mode

2

YY 40 00 04 CS(1) = EN_VME_RESET WO VME soft reset

3

YY 40 00 10 CS(2) = EN_CNTRL_SIG RW Control signals

4

YY 40 00 50 CS(3) = EN_SEED_SEL RW Seed Selection

5

YY 40 00 60 CS(4) = EN_DAISY_SUM RW Daisy-chain Sum

6

YY 40 00 70 CS(5) = EN_L2_INFO RW Info to L2/CLIST

Table 1. List of regions defined for LOCOS in the VME Address Space and their relative Address Base. Each region tests a specific LOCOS functionality as described on the last column. The third and fourth column show the CY7C960 Chip Select output used to enable each region and whether it is active in a Read and/or Write VME transaction.

Region Address Strobe Name Description

1

YY 40 00 00 TEST_MODE which of 5 possible LOCOS test modes

2

YY 40 00 04 VME_RESET soft VME Reset signals
  YY 40 00 08-C   UNUSED

3

YY 40 00 10 CURR_BUF Current L2 buffer (from CLIQUE)
  YY 40 00 14 BUF_STRB Current Buffer Strobe (from CLIQUE)
  YY 40 00 18 SEL_THR Current Theshold Pass (from CLIQUE)
  YY 40 00 1C THR_STRB Current Trheshold Strobe (from CLIQUE)
  YY 40 00 20 START_PASS Start of current Pass (from CLIQUE)
  YY 40 00 24 SEED_REQ Seed Position Request (from CLIQUE)
  YY 40 00 28 CRATE_HSD Crate has at least one Seed (to CLIQUE)
  YY 40 00 2C CRATE_SEL Crate Selected to look for SEED (from CLIQUE)
  YY 40 00 30 SEED_SEL Seed Selected (to CLIQUE)
  YY 40 00 34 CRATE_ON Crate working on Cluster Expansion ( to CLIQUE)
  YY 40 00 38 ERASE_CLUSTER Erase present Cluster buffers (from CLIQUE)
  YY 40 00 3C START_RIPPLE Start Daisy-chain Sum (from CLIQUE)
  YY 40 00 40 CRSUM_DONE Daisy-chain Sum is Done ( to CLIQUE)
  YY 40 00 44 CRSUM_SEND Daisy-chain Sum Sent to L2 (from CLIQUE)
  YY 40 00 48 PASS_DONE Current Pass is Done (from CLIQUE)
  YY 40 00 4C SEED_POS Send Seed Coordinates (to CLIQUE)

4

YY 40 00 50 BRD_HSD Get list of Board with Seed (from DCAS)
  YY 40 00 54 BRD_SEL Send Board Selected to start cluster (to DCAS)
  YY 40 00 58 SEED_ETA Get Seed Coordinates (from DCAS)
  YY 40 00 5C   UNUSED

5

YY 40 00 60 DAISY_SUM_EM Sum cluster EM energy from Daisy-chain
  YY 40 00 64 DAISY_SUM_HD Sum cluster HD energy from Daisy-chain
  YY 40 00 68 DAISY_SUM_NTOW Sum Number of Towers in Cluster from Daisy-chain
  YY 40 00 6C   UNUSED

6

YY 40 00 70 L2_BUF Send Buffer Number and Pass Number to L2
  YY 40 00 74 L2_SEED_POS Send Seed Position to L2
  YY 40 00 78 L2_EM_ENE Send cluster EM energy to L2
  YY 40 00 7C L2_HD_ENE Send cluster HD energy to L2
  YY 40 00 80 L2_NTOW Send Number of Tower in Cluster to L2
  YY 40 00 84-C   UNUSED

Table 2. Valid LOCOS VME addresses recognized in each region and Strobe signals they produce. In the schematics the Strobe name is preceded by RD or WR depending on whether it is set during a Read or Write VME Transaction. The last columns specify which LOCOS function they are designed to test (if Read Strobes) or simulate (if Write Strobes).

Region Local Bus Bit Map Bit Description

1

MOD(31:0)

0 = LD(0)

 Set receiving from DCAS Simulation Mode
   

1 = LD(1)

Set receiving from CLIQUE Simulation Mode
   

2 = LD(2)

Set sending to CLIST Simulation Mode
   

3 = LD(3)

Set sending to CLIQUE Simulation Mode
   

4 = LD(4)

Set sending to DCAS Simulation Mode
   

16 = LD(16)

Clear receiving from DCAS Simulation Mode
   

17 = LD(17)

Clear receiving from CLIQUE Simulation Mode
   

18 = LD(18)

Clear sending to CLIST Simulation Mode
   

19 = LD(19)

Clear sending to CLIQUE Simulation Mode
   

20 = LD(20)

Clear sending to DCAS Simulation Mode

2

RSD(31:0)

0 = LD(0)

 Set software VME Reset
   

16 = LD(16)

Clear software VME Reset

3

CSD(31:0)

(1:0) = LD(1:0)

 Set from/to CLIQUE Control Signal (2 bit max.)
   

(17:16) = LD(17:16)

Clear from/to CLIQUE Control Signal (2 bit max.)
   

(4:0) = LD(4:0)

Simulate to Seed h bits sent to CLIQUE
   

(17:16) = LD(17:16)

Simulate to Seed f bits sent to CLIQUE

4

SSD(31:0)

(11:0) = LD(11:0)

 Simulate Board with Seed from DCAS or

Board with Selected Seed to DCAS

   

(2:0) = LD(2:0)

Simulate Seed h bit from DCAS board with a seed
   

3 = LD(3)

Simulate Seed Select from DCAS

5

DSD(31:0)

(12:0) = LD(12:0)

 Left Daisy-chain energy bits
   

(28:16) = LD(28:16)

Right Daisy-chain energy bits
   

(5:0) = LD(5:0)

Left Daisy-chain number of tower bits
   

(21:16) = LD(21:16)

Right Daisy-chain number of tower bits

6

L2D(31:0)

(1:0) = LD(1:0)

 Current buffer bits to CLIST
   

(3:2) = LD(3:2)

Current pass bits to CLIST
   

0 = LD(0)

Selected crate bit to CLIST
   

(2:1) = LD(2:1)

Seed f bits to CLIST
   

(7:3) = LD(7:3)

Seed h bits to CLIST
   

(11:0) = LD(11:0)

Cluster energy (EM/HAD) bits to CLIST
   

13 = LD(13)

Energy overflow (EM/HAD) bits to CLIST
   

(6:0) = LD(6:0)

Cluster number of tower bits to CLIST

Table 3. Local data busses defined for LOCOS regions; the last two columns give the details of their contents and of which LD(31:0) bits they are a copy of.

APPENDIX A

The VHDL code used to program the Region Decoder PAL is given here, together with the PAL pin assignment for the different inputs and outputs.

REGDEC.VHDL

LIBRARY ieee;

USE ieee.std_logic_1164.ALL;

ENTITY vme_region_pal IS PORT (

-- MASK/COMPARE outputs VCOMP*(3:0)

vcomp : IN std_logic_vector(3 DOWNTO 0);

-- VME addresses (22,7:2)

addr : IN std_logic_vector(6 DOWNTO 0);

-- read/write VME cycle

rw : IN std_logic;

-- board reset

reset : IN std_logic

-- 1 out of 16 regions

region : OUT std_logic_vector(3 DOWNTO 0)

);

END vme_region_pal;

ARCHITECTURE reg_decoder OF vme_region_pal IS

-- concatenates inputs in a single vector

SIGNAL inputs: std_logic_vector(11 DOWNTO 0);

SIGNAL val_add: std_logic_vector(3 DOWNTO 0);

BEGIN

inputs <= vcomp & addr & rw;

WITH inputs SELECT

val_add <= "0000" WHEN "000010000000", -- 40 00 00 WO

"0001" WHEN "000010000010", -- 40 00 04 WO

"0010" WHEN "000010001000", ---------------

"0010" WHEN "000010001010", --

"0010" WHEN "000010001100", --

"0010" WHEN "000010001110", --

"0010" WHEN "000010010000", --

"0010" WHEN "000010010010", -- from

"0010" WHEN "000010010100", -- 40 00 10

"0010" WHEN "000010010110", -- to

"0010" WHEN "000010011000", -- 40 00 4F

"0010" WHEN "000010011010", -- W

"0010" WHEN "000010011100", --

"0010" WHEN "000010011110", --

"0010" WHEN "000010100000", --

"0010" WHEN "000010100010", --

"0010" WHEN "000010100100", --

"0010" WHEN "000010100110", -- ---------

"0010" WHEN "000010001001", ---------------

"0010" WHEN "000010001011", --

"0010" WHEN "000010001101", --

"0010" WHEN "000010001111", --

"0010" WHEN "000010010001", --

"0010" WHEN "000010010011", -- from

"0010" WHEN "000010010101", -- 40 00 10

"0010" WHEN "000010010111", -- to

"0010" WHEN "000010011001", -- 40 00 4F

"0010" WHEN "000010011011", -- R

"0010" WHEN "000010011101", --

"0010" WHEN "000010011111", --

"0010" WHEN "000010100001", --

"0010" WHEN "000010100011", --

"0010" WHEN "000010100101", --

"0010" WHEN "000010100111", -- ---------

"0011" WHEN "000010101000", -- 40 00 50 W

"0011" WHEN "000010101010", -- 40 00 54 W

"0011" WHEN "000010101100", -- 40 00 58 W

"0011" WHEN "000010101001", -- 40 00 50 R

"0011" WHEN "000010101011", -- 40 00 54 R

"0011" WHEN "000010101101", -- 40 00 58 R

"0100" WHEN "000010110000", -- 40 00 60 W

"0100" WHEN "000010110010", -- 40 00 64 W

"0100" WHEN "000010110100", -- 40 00 68 W

"0100" WHEN "000010110001", -- 40 00 60 R

"0100" WHEN "000010110011", -- 40 00 64 R

"0100" WHEN "000010110101", -- 40 00 68 R

"0101" WHEN "000010111000", -- ------------

"0101" WHEN "000010111010", -- from

"0101" WHEN "000010111100", -- 40 00 70

"0101" WHEN "000010111110", -- to

"0101" WHEN "000011000000", -- 40 00 80 W

"0101" WHEN "000010111001", -- ------------

"0101" WHEN "000010111011", -- from

"0101" WHEN "000010111101", -- 40 00 70

"0101" WHEN "000010111111", -- to

"0101" WHEN "000011000001", -- 40 00 80 R

"1111" WHEN OTHERS;

region <= "1111" WHEN (reset = '1') ELSE

val_add;

END reg_decoder;

REGDEC_PAL PINOUT

Input Name Signal Name

Pin No.
RESET Board RESET

2

RW VME R-W* cycle

3

VCOMP0* VCOMP(0)

12

VCOMP1* VCOMP(1)

13

VCOMP2* VCOMP(2)

16

VCOMP3* VCOMP(3)

19

LA_22 LA(22)

11

LA_7 LA(7)

10

LA_6 LA(6)

9

LA_5 LA(5)

7

LA_4 LA(4)

6

LA_3 LA(3)

5

LA_2 LA(2)

4

REG0 REG(0)

27

REG1 REG(1)

26

REG2 REG(2)

18

REG3 REG(3)

17

GND GROUND

14

VCC +5V

28